Monday, 18 July 2016


Learn LabVIEW FPGA by programming the on-board Xilinx FPGA of the student-focused embedded device NI myRIO.

Related Articles

Utilizing LabVIEW FPGA on NI myRIO:

Overview

This article is the third in a series of five topics that cover the fundamentals of programming LabVIEW FPGA on the NI myRIO through simple hands-on examples. Last time, we covered how to turn a Light-Emitting Diode (LED) ON and OFF through the Digitial Line of the device. Today, we will see with several additions to our previous code, how the brightness of the LED can be adjusted as well. Moreover, we will look into the reading of analog values from a varying-resistance component such as a potentiometer. Finally, we will connect these two concepts to control the brightness of the LED through the rotation of the variable resistor. 
Recommended component list:
  1. 3.3V LED - 5V should also work, but expect less overall brightness
  2. 330 Ohm Resistor - used to limit the current flowing through the LED, see Article 2 of this series, where we talk about it in greater detail
  3. 10kOhm Potentiometer - any other varying-resistance component would also work, including a linear potentiometer or an LDR. While it is suggested to use a 10kOhm base value, most other values should be fine too
  4. (Optional) 1kOhm Pull-Down Resistor - this resistor should be used as a reference when reading varying-resistance components without a third pin (see below).
  5. (Optional) Jumper wires and a breadboard

Component Wiring

Last time, we used Port C of the myRIO which hosts two Analog Inputs, two Analog Outputs, and 8 Digital Lines. However, that's not even half of its peripherals - it has two more ports with 2x Analog Outputs, 4x Analog Inputs and 16x DIO each. To appreciate the vast number of I/O this device provides and to get more familiar with it, let's use Port B for the following example.
To keep our circuit tidy as it grows bigger, let's move to a breadboard. The 330 Ohm current-limiting resistor will go to the Anode of the LED which will then be connected to the DIO0 terminal of the myRIO Port B (see Figure 1). Connect the other pin of the LED to Digital Ground (DGND) terminal. Next, we need to wire the variable resistor (potentiometer) to the myRIO. To do so, we will connect the middle pin of the potentiometer (sometimes referred to as the "wiper") to Analogue Input (AI0) of Port B and the remaining pins should be connected to the AGND and +5Vterminals (see Figure 2). For a more detailed connection layout of myRIO, refer to its datasheet (PDF). The circuit diagram is also shown in Figure 3 below for better reference.

Figure 1 Port B with all connections identified 

Figure 2 Breadboard with all connections identified
 
Figure 3 Circuit Diagram

FPGA Code

Having all of our circuitry wired up, let's create a new LabVIEW project same as in previous articles. Within the newly-created project, locate the NI myRIO target and create a new VI called FPGA.VI under Chassis >> FPGA Target (see our first article for full explanation if you need a refresher). Our main FPGA VI should look similar to what is shown in Figure 4 below. The completed example code is attached at the bottom of the article if you are keen to test it straight away, but to make sure we understand what is going on here, let's analyze it as well.
This time, we will create two while loops - one for data acquisition ("DAQ Loop") and one for driving the LED ("PWM Loop"). The first one will read and scale the potentiometer data while the second will produce a Pulse-Width Modulation signal on the DIO0 pin. Here is a short but sweet article on PWM if you are feeling a bit rusty in regard to the topic. Just like before, we need to drag peripherals into our Block Diagram. We will need one for Analog Input from the potentiometer (A) and one for producing a Pulse Width Modulation signal (B) on the DIO0 line. Notice how the names used in LabVIEW match the ones we've indicated in Figure 3. Once we read in the potentiometer value, we also need to scale it (B). This scaling allows us to map the 12bit value coming in from the single-ended analog input channel (sampled through an onboard ADC) to a unit interval varying from 0 to 1. Therefore, values that would usually range from 0 to 4096 for the furthest potentiometer positions are now represented as fixed-point values between 0 to 1 on the Indicator called "Duty Cycle" (C). Any other value in between will also be scaled accordingly; this will essentially control how bright we want our LED to be.
The "PWM Loop" includes a stacked sequence structure (D), which enforces sequential behavior (remember, LabVIEW is inherently parallel!) for the four consecutive sections. The first section drives the LED Pin (DIO0) HIGH. The next section waits for a given amount of time calculated based on the Duty Cycle calculated. Notice how in (C) we are reading from the same location in multiple places, this is called a Local Variable. A Local Variable can be made in LabVIEW by right-clicking on an indicator or a control and selecting Create >> Local Variable. While useful in a number of scenarios, they can sometimes cause what's called a Race Condition, therefore, be conservative with their usage. In our case, since we are only writing to the variable in one location, this problem is avoided.
The length of time that our LED is on also depends on the frequency we're running our code at (F). Since our eyes cannot distinguish light flickering at around the 50Hz mark, we conveniently set this on our FPGA.VI Front Panel control called "Frequency (Hz)" (F). Therefore, instead of flickering, we will actually see the LED dimming proportionally to how long we keep the LED on and off (sections 3 & 4 of the stacked sequence structure (D) turn it off and wait for the remainder of time). The time that the LED is kept on in relation to it being off is determined by the Duty Cycle. In literature, you will often see Duty Cycle represented as a percentage. In our case it's a unity value varying between 0 (0%) and 1 (100%). Besides that, everything else stays the same. Let's also not forget to configure our timing (E) to be in mSec (milliseconds). At this point, we should be ready to compile our code and test it out.

 
Figure 4 LabVIEW FPGA Front Panel and Block Diagram explained

Running the FPGA Code

Finally, if our circuitry matches what's shown in Figures 2 and 3, as well as having our code functionality not differing from Figure 4, we should be able to adjust the brightness of the LED by rotating the potentiometer. Functionally, the LED is turning ON and OFF really quickly, however, our eyes cannot distinguish that and we actually just see different light levels. To verify this, you could change the "Frequency (Hz)" control on the Front Panel of the FPGA VI to a lesser value, say, 1Hz. Since we have made it as Control, LabVIEW allows us to tweak it on-the-fly so no additional compiling is necessary. As an additional exercise, you could try to adjust the software scaling to be different or inverted (either through "Scaling" control (B) or a custom code snippet). If you decided to control a set of LEDs from the same potentiometer, all you'd need to do is make a copy of the bottom loop and change the Digital Line since we're reading the "Duty Cycle" value from the "DAQ Loop" which is independent.
Congratulations on creating a full Analog Input and Output loop using NI myRIO. Next time, we will move to a more advanced topic of LabVIEW FPGA - Buffers. Using them, we will learn how high-speed, high-throughput applications that can be made in both hobby projects and the industry alike!

Monday, 2 May 2016

Characteristics of Operational Amplifiers


This integrated circuit has many characteristics that approach those that are considered to be ideal.

The Ideal Operational Amplifier

With the operational amp having such characteristics that are close to ideal, it is rather easy to design and build circuits using the IC op amp. Equally important is that the op-amp circuit components can perform at theoretical levels that have been predicted. This article will cover analyzing circuits containing op amps, how to use these op-amps to design amplifiers, and important nonideal characteristics of op amps.

 Supporting Information


The op-amp has three terminals: two input terminals and one output terminal. The figure below, Fig 1.1 illustrates the symbol used for the op-amp discussed in this article. The two terminals on the left-hand side of the op-amp, 1 and 2, are the two input terminals, and on the right side, terminal 3 is the output terminal. In order to operate an amplifier, it needs to be connected to a dc power supply. Generally speaking, most integrated circuit op-amps require not one, but two dc power supplies, as Fig 1.2 illustrates. These two terminals, 4 and 5, are connected to a positive voltage source Vcc and a negative voltage source Vee, respectively. Figure 1.2 (b) shows the dc power supplies as batteries, having a common ground source. The ground source that the two dc power supplies are connected to is actually just the common terminal of the two power supplies. It is interesting that this is so because not one terminal on the op-amp package is physically connected to the ground. For simplicity in this article, the op-amp power supplies will not be illustrated. 


Fig 1.1 Op-amp symbol 


Fig 1.2 Op-amp connections to the dc power supplies

Besides the five terminals discussed thus far, an op-amp may have other terminals for specific purposes. Such purposes might be for frequency compensation and negative feedback or offset nulling, which reduces small DC offsets that can be amplified. 

Introducing Characteristics of the Ideal Operational Amp

Looking at the actual functions of the circuit inside the op-amp, we see that it is designed to determine the difference between voltage signals that are applied directly to the two input terminals (the difference of  v2 - v1). Once this quantity is found, it is then multiplied by a number A, and in turn, the voltage results in the term A(v2-v1). From here on out, when the voltage is referred to at the terminal, it is meant to be the voltage between that individual terminal and the ground; hence v1 is the voltage applied between terminal 1 and the ground. 
An ideal op-amp shouldn't be drawing any current for the inputs; meaning, the current into terminal 1 and signal into terminal 2 are both zero. This is to say that the input impedance of an ideal op-amp is supposed to be infinite.
Focusing on the output terminal now, it should act as though it is a terminal of an ideal voltage source. Simply put, the voltage across terminal 3 and ground will always equate to A(v2 - v1), and independent of the current that may or may not be drawn from the third terminal into a load impedance. 
With all of this stated, a model can be illustrated for the op-amp shown in Fig 1.3. Looking at the model, one can see that the output terminal has the same sign as v2 but opposite sign of v1. With this in mind, the input terminal is called the inverting input terminal, being denoted by a "-" sign while the input terminal 2 is called the noninverting input terminal and is denoted by a "+" sign. 
As stated before, the op-amp is designed to sense a difference between voltage signals and will ignore any given signal that is common to both inputs. What this means, is that if v1 = v2 = 1 V, then the output will accordingly (ideal) be zero. This phenomenon is also known as what's called common-mode rejection. This can also be stated as zero common-mode gain, or analogously, infinite common-mode rejection. For now, we can say that the op-amp is a differential input, single-ended output amplifier, with the latter term pertaining to the fact that this op amp's output lies between the ground and terminal 3. 

   
Figure 1.3 Circuit model of ideal op-amp

The term A, is what is known as the differential gain. It is known to be this because it is the desired gain of the op-amp when various signals are applied to the two inputs, 1 and 2. Another name that can we associated with the term is open-loop gain. This gain can be obtained when there is no feedback used in the IC op-amp. Normally, the open-loop gain tends to have an exceptionally high value; an ideal op-amp actually has an infinite open-loop gain.
One characteristic worth noting of op-amps are dc amplifiers or direct-coupled, which stands for dc or direct current since it amplifies signals with frequencies close to zero. Considering that op-amps are direct-coupled ICs, they are much more versatile which allows us to use them in many more important applications. However, direct-coupling can cause some serious problems that will be discussed later on.
Moving over to bandwidth, an ideal op-amp has gain A that will remain constant to a frequency of zero and all the way to an infinite frequency. In other words, an ideal amp can amplify signals of any frequency with an equal gain which allows them to have infinite bandwidth. Thus far, all characteristics and properties of ideal op-amps have been discussed, except one: the gain, A, of an ideal op-amp should have a value that is large and infinite, ideally speaking. However, this brings a good question: if there is a gain of an infinite value, how can the op-amp be used in any application? This can be answered rather simply because the op-amp will not be used solely in an open-loop configuration in almost every application one could think of. In the following article, I will discuss how other components will come into play by applying a feedback to complete or close the loop around the op-amp. allengineerelectrical.blogspot.com

Summary

As of now, we have discussed how an operational amplifier is so popular due to its versatility, as well as the characteristics and functions of the ideal op-amp. To summarize, the characteristics of an ideal op-amp are as follows:
  • Infinite bandwidth due to the ideal gain inside of the op-amp
  • Infinite open-loop gain A
  • Infinite or zero common-mode gain
  • Input impedance of an infinite value
  • Output impedance of zero
You should now know what an op-amp is used for as well as what to look for in an ideal op-amp. In a forthcoming article, we will pick up where we left off; we will introduce and explain the two different types of voltage gain as well as the inverting configuration of an op-amp that is used for inverting a signal input to have an inverted output gain. We will also go further into the closed-loop gain and how op-amps are not used alone rather with components. Finally, the article will talk about the analysis of the inverting configuration of the op-amp and the effects of having a finite open-loop gain. If you have any questions or comments, please leave them bel